Working Time: 9:30-18:00
2025 The 10th International Conference on Integrated Circuits and Microsystems
    Email: icicm_conf@vip.163.com
    Secretary: Ms. Mila Xiao(肖老师)

Track 12: Mixed-Signal (PLL, ADDA, SERDES)

混合信号集成电路(锁相环,数据转换,高速接口)

Organizers / 组织者

Chair: Chao Zhao 赵超
Southeast University, China
东南大学,中国

Abstract / 论坛简介

It is mainly dedicated to the research and sharing of cutting-edge technologies in analog-to-digital mixed-signal circuits, including high-performance clock generation, high-performance data conversion, and analog-to-digital mixed-signal IC design related to high-speed interfaces.

本专题主要致力于研究和分享模数混合信号电路的前沿技术,包括高性能时钟发生、高性能数据转换以及与高速接口相关的模数混合信号集成电路设计。

Topics / 主题范围

Data Conversion / 数据转换
Phase-Locked Loops / 锁相环
High-Speed Interfaces / 高速接口
Clock and Data Recovery / 时钟与数据恢复