Working Time: 9:30-18:00
2026 The 11th International Conference on Integrated Circuits and Microsystems
    Email: icicm_conf@vip.163.com
    Secretary: Ms. Carrie Lim (林老师)

Track 26: Advanced Clock Generation and Distribution Circuits

Track 26: 先进时钟产生与分配电路

Organizers / 组织者

Organizer / 组织者
Xinlin Geng 耿新林
Lecturer, University of Electronic Science and Technology of China
电子科技大学,讲师
Organizer / 组织者
Zheng Wang 王政
Professor, University of Electronic Science and Technology of China
电子科技大学,教授

Abstract / 论坛简介

English: This session focuses on state-of-the-art research on advanced clock generation and distribution circuits, including oscillators, frequency synthesizers, and low-jitter clock distribution networks, etc., for modern SoC, communication, and high-speed interface systems. Original contributions on theoretical advances, innovative circuit designs, and experimental validations are welcome. This session targets key performance improvements covering ultra-low phase noise and jitter, fast frequency hopping, high spurious suppression, low power consumption, compact integration, and robust PVT stability, offering a platform to share cutting-edge progress in clocking circuit techniques.

中文: 本专题聚焦先进时钟产生与分配电路的前沿研究,涵盖振荡器、频率综合器与低抖动时钟分配网络等,面向现代 SoC、通信及高速接口系统。欢迎理论突破、创新电路设计与实验验证方面的原创性投稿。本专题旨在提升超低相位噪声与抖动、快速跳频、高杂散抑制、低功耗、紧凑集成与鲁棒 PVT 稳定性等关键性能,为分享时钟电路技术的前沿进展提供交流平台。

Topics / 讨论主题

高性能宽带振荡器
High-performance and wideband oscillator
低噪声低杂散频率综合器
Low-noise and low-spur frequency synthesizer
低功耗紧凑型时钟产生与分配
Low-power and compact clock generation and distribution
时钟电路的 PVT 不敏感技术
PVT-insensitive technologies for clocking circuits
面向现代 SoC 的数字密集型与混合时钟架构
Digital-intensive and hybrid clocking architectures for modern SoC

Invited Speakers / 拟邀报告人

Invited Speaker / 拟邀报告人
Ya Zhao 赵亚
Xidian University
西安电子科技大学
Invited Speaker / 拟邀报告人
Zonglin Ye 叶宗霖
University of Electronic Science and Technology of China
电子科技大学