Track 11: High-Speed Interfaces & Silicon Photonics

Driven by the rapid evolution of artificial intelligence, high-performance computing, and advanced semiconductor packaging, interconnect bandwidth, latency, density and energy efficiency have become critical challenges for future computing systems. This forum focuses on emerging technologies in high-speed wireline communication system, high-density die-to-die interconnect, optoelectronic integration, and chip-to-chip interconnects, covering advanced SerDes, energy-efficient I/O circuits, Chiplet-based architectures, UCIe interfaces, silicon photonics, co-packaged optics (CPO), and heterogeneous integration. The forum aims to bring together researchers and industry experts to exchange innovative ideas on Tb/s-scale high-bandwidth, low-power, and highly reliable interconnect solutions, fostering the development of next-generation AI and HPC systems.

随着人工智能、高性能计算及先进封装技术的快速发展，数据传输带宽、互联延迟、密度与能效已成为限制未来芯片系统性能提升的关键瓶颈。本论坛聚焦高速接口、光电集成与芯片间互联领域的前沿技术，围绕高速有线通信SerDes芯片、高密度高带宽芯粒互连、高速低功耗收发机、Chiplet互连、UCIe接口、硅光子集成、共封装光学（CPO）以及异构集成等方向展开深入交流。论坛旨在汇聚学术界与产业界专家，共同探讨面向AI时代的Tb/s级高带宽、低功耗、高可靠互联架构与关键电路设计技术，推动下一代智能计算系统的发展。